| |
| 1994 | ||
|---|---|---|
| 3 | Mary L. Bailey, Jack V. Briner Jr., Roger D. Chamberlain: Parallel Logic Simulation of VLSI Systems. ACM Comput. Surv. 26(3): 255-294 (1994) | |
| 1991 | ||
| 2 | EE | Jack V. Briner Jr., John L. Ellis, Gershon Kedem: Breaking the Barrier of Parallel Simulation of Digital Systems. DAC 1991: 223-226 |
| 1988 | ||
| 1 | Jack V. Briner Jr.: A Framework for Analyzing Parallel Discrete Event Simulation. Int. CMG Conference 1988: 180-185 | |
| 1 | Mary L. Bailey | [3] |
| 2 | Roger D. Chamberlain | [3] |
| 3 | John L. Ellis | [2] |
| 4 | Gershon Kedem | [2] |