David Boland
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2008
1
EE
David Boland,
George A. Constantinides
: An FPGA-based implementation of the MINRES algorithm.
FPL 2008
: 379-384
Coauthor
Index
1
George A. Constantinides
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)