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2007 | ||
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2 | EE | Régis Roubadia, Sami Ajram, Guy Cathébras: Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. ISCAS 2007: 2490-2493 |
2006 | ||
1 | EE | Régis Roubadia, Sami Ajram, Guy Cathébras: Low Power and Low Jitter Wideband Clock Synthesizers in CMOS ASICs. PATMOS 2006: 458-467 |
1 | Guy Cathébras | [1] [2] |
2 | Régis Roubadia | [1] [2] |