2003 |
27 | | Alexander V. Veidenbaum,
Kazuki Joe,
Hideharu Amano,
Hideo Aiso:
High Performance Computing, 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings
Springer 2003 |
1991 |
26 | | Hideo Aiso:
25 Years of MITI and Its Influence on Computing Research in Japan.
IEEE Computer 24(9): 99-100 (1991) |
1989 |
25 | | Jun Miyazaki,
Kenji Takeda,
Hideharu Amano,
Hideo Aiso:
A New Version of a Parallel Production System Machine, MANJI-II.
IWDM 1989: 317-330 |
1988 |
24 | | Hideo Tamura,
Hideo Aiso:
Logic Programming Debugger Using Control Flow Specification.
LP 1988: 67-81 |
1987 |
23 | | Jun Miyazaki,
Hideharu Amano,
Kenji Takeda,
Hideo Aiso:
A Shared Memory Architecture for MANJI Production System Machine.
IWDM 1987: 517-531 |
22 | | M. Tanabe,
Hideo Aiso:
The Unification Processor by Pipeline Method.
IWDM 1987: 627-639 |
21 | | Rong Yang,
Hideo Aiso:
P-Prolog: A Parallel Logic Language Based on Exclusive Relation.
New Generation Comput. 5(1): 79-95 (1987) |
1986 |
20 | | Michio Isoda,
Hideo Aiso,
Noriyuki Kamibayashi,
Yoshifumi Matsunaga:
Model for Lexical Knowledge Base.
COLING 1986: 451-453 |
19 | | Chizuko Saito,
Hideharu Amano,
Tomohiro Kudoh,
Hideo Aiso:
An Adaptable Cluster Structure of (SM)²-II.
CONPAR 1986: 53-60 |
18 | | Rong Yang,
Hideo Aiso:
P-Prolog: A Parallel Logic Language Based on Exclusive Relation.
ICLP 1986: 255-269 |
17 | | Gyo Osawa,
Toshio Kawai,
Hideo Aiso:
Fault Tolerant Scheme on Partial Differential Equations.
ICPP 1986: 413-416 |
16 | | Yasuro Shobatake,
Hideo Aiso:
A Unification Processor Based on a Uniformly Structured Cellular Hardware.
ISCA 1986: 140-148 |
1985 |
15 | | Hideharu Amano,
Taisuke Boku,
Tomohiro Kudoh,
Hideo Aiso:
(SM)²-II: A New Version of the Sparse Matrix Solving Machine.
ISCA 1985: 100-107 |
1984 |
14 | | Masahiro Nakazawa,
Michio Isoda,
Jun Miyazaki,
Hideo Aiso:
MILK: Multi Level Interactive Logic Simulator at Keio University: Experience in Using the Contraints Language.
Expert Database Workshop 1984: 469-485 |
1983 |
13 | | Yoshiyasu Takefuji,
Takakazu Kurokawa,
Masato Ishizaki,
Hideo Aiso:
New Matrix Equation Solvers in GF(2) Employing Cramer with Chio Method.
ICPP 1983: 47-50 |
12 | | Hideharu Amano,
Takaichi Yoshida,
Hideo Aiso:
(SM)2: Sparse Matrix Solving Machine
ISCA 1983: 213-220 |
1982 |
11 | | Noriyuki Kamibayashi,
H. Ogawana,
K. Nagayama,
Hideo Aiso:
Heart: An Operating System Nucleus Machine Implemented by Firmware.
ASPLOS 1982: 195-204 |
10 | | Yasushi Kiyoki,
Michio Isoda,
K. Kojima,
Katsumi Tanaka,
A. Minematsu,
Hideo Aiso:
Performance Analysis for Parallel Processing Schemes of Relational Operations and a Relational Database Machine Architecture with Optimal Scheme Selection Mechanism.
ICDCS 1982: 196-205 |
9 | | Yoshiyasu Takefuji,
Koichiro Tsujino,
Mari Ibuki,
Hideo Aiso:
A novel approach to parallel processing cryptosystem.
ICPP 1982: 313-315 |
1981 |
8 | | Kazuo Seo,
A. Minematsu,
Hideo Aiso,
Noriyuki Kamibayashi:
A Look-Ahead Data Staging Architecture for Relational Data Base Machines.
ISCA 1981: 389-406 |
7 | | Yasushi Kiyoki,
Katsumi Tanaka,
Hideo Aiso,
Noriyuki Kamibayashi:
Design and Evaluation of a Relational Data Base Machine Employing Advanced Data Structures and Algorithms.
ISCA 1981: 407-424 |
1979 |
6 | | J. Abe,
Ken Sakamura,
Hideo Aiso:
An Analysis of Software Project Failure.
ICSE 1979: 378-385 |
5 | | Ken Sakamura,
Kiochi Nakano,
Yoshio Kato,
Hideo Aiso:
A New Approach to an Adaptive Computer - An Automatic Recovery Mechanism to Prevent the Occurance of Subtract Errors.
ISCA 1979: 31-41 |
1977 |
4 | EE | Ryoichi Yoshikawa,
Tatsuo Kimura,
Yasuhiro Nara,
Hideo Aiso:
A multi-microprocessor approach to a high-speed and low-cost continuous-system simulation.
AFIPS National Computer Conference 1977: 931-936 |
3 | EE | Tadao Ichikawa,
Ken Sakamura,
Hideo Aiso:
ARES: a memory, capable of associating stored information through relevancy estimation.
AFIPS National Computer Conference 1977: 947-954 |
2 | | Ken Sakamura,
Hideaki Kitafusa,
Yukio Takeyari,
Hideo Aiso:
A Debugging Machine - An Approach to an Adaptive Computer.
IFIP Congress 1977: 23-28 |
1974 |
1 | | Hideo Aiso,
Mario Tokoro,
Shunichi Uchida,
Hideki Mori,
Noriyuki Kaneko,
Motoo Shimada:
A Very High-Speed Microprogrammable Pipeline Signal Processor.
IFIP Congress 1974: 60-64 |