| |
| 2003 | ||
|---|---|---|
| 2 | EE | Nabil M. Abdulrazzaq, Sandeep K. Gupta: Path-Delay Fault Simulation for Circuits with Large Numbers of Paths for Very Large Test Sets. VTS 2003: 186-196 |
| 2000 | ||
| 1 | Nabil M. Abdulrazzaq, Sandeep K. Gupta: Test generation for path-delay faults in one-dimensional iterative logic arrays. ITC 2000: 326-335 | |
| 1 | Sandeep K. Gupta | [1] [2] |