| |
| 2006 | ||
|---|---|---|
| 3 | EE | Qingjin Du, Jingcheng Zhuang, Tad A. Kwasniewski: A Low Phase Noise Dll Clock Generator with a Programmable Dynamic Frequency Divider. CCECE 2006: 701-704 |
| 2 | EE | Jingcheng Zhuang, Qingjin Du, Tad A. Kwasniewski: An eye detection technique for clock and data recovery applications. ISCAS 2006 |
| 2005 | ||
| 1 | Jingcheng Zhuang, Qingjin Du, Tad A. Kwasniewski: A 4-GB/S half-rate clock and data recovery circuit with a 3-stage VCO. Circuits, Signals, and Systems 2005: 128-131 | |
| 1 | Qingjin Du | [1] [2] [3] |
| 2 | Tad A. Kwasniewski | [1] [2] [3] |