| |
| 2008 | ||
|---|---|---|
| 2 | EE | Jiayi Zhu, Peilin Liu, Dajiang Zhou: An SDRAM controller optimized for high definition video coding application. ISCAS 2008: 3518-3521 |
| 2007 | ||
| 1 | EE | Dajiang Zhou, Peilin Liu: A Hardware-Efficient Dual-Standard VLSI Architecture for MC Interpolation in AVS and H.264. ISCAS 2007: 2910-2913 |
| 1 | Peilin Liu | [1] [2] |
| 2 | Jiayi Zhu | [2] |