dblp.uni-trier.dewww.uni-trier.de

Han-Saem Yun

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2005
9EEWoonseok Kim, Dongkun Shin, Han-Saem Yun, Jihong Kim, Sang Lyul Min: Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. J. Low Power Electronics 1(3): 207-216 (2005)
2003
8EEHan-Saem Yun, Jihong Kim: On energy-optimal voltage scheduling for fixed-priority hard real-time systems. ACM Trans. Embedded Comput. Syst. 2(3): 393-430 (2003)
7EEHan-Saem Yun, Jihong Kim, Soo-Mook Moon: Time Optimal Software Pipelining of Loops with Control Flows. International Journal of Parallel Programming 31(5): 339-391 (2003)
2002
6EEHan-Saem Yun, Jihong Kim, Soo-Mook Moon: Optimal software pipelining of loops with control flows. ICS 2002: 117-128
5EEWoonseok Kim, Dongkun Shin, Han-Saem Yun, Jihong Kim, Sang Lyul Min: Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. IEEE Real Time Technology and Applications Symposium 2002: 219-228
4EEDongkun Shin, Hojun Shim, Yongsoo Joo, Han-Saem Yun, Jihong Kim, Naehyuck Chang: Energy-Monitoring Tool for Low-Power Embedded Programs. IEEE Design & Test of Computers 19(4): 7-17 (2002)
2001
3EEHan-Saem Yun, Jihong Kim, Soo-Mook Moon: A First Step Towards Time Optimal Software Pipelining of Loops with Control Flows. CC 2001: 182-199
2EEHan-Saem Yun, Jihong Kim: Power-aware modulo scheduling for high-performance VLIW processors. ISLPED 2001: 40-45
1999
1EESuhyun Kim, Soo-Mook Moon, Jinpyo Park, Han-Saem Yun: Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling. LCPC 1999: 85-99

Coauthor Index

1Naehyuck Chang [4]
2Yongsoo Joo [4]
3Jihong Kim [2] [3] [4] [5] [6] [7] [8] [9]
4Suhyun Kim [1]
5Woonseok Kim [5] [9]
6Sang Lyul Min [5] [9]
7Soo-Mook Moon [1] [3] [6] [7]
8Jinpyo Park [1]
9Hojun Shim [4]
10Dongkun Shin [4] [5] [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)