| |
| 1995 | ||
|---|---|---|
| 2 | EE | Hitoshi Yoshizawa: How sub-micron delay and timing issues will be solved? ASP-DAC 1995 |
| 1985 | ||
| 1 | EE | Shigeo Noda, Hitoshi Yoshizawa, Etsuko Fukuda, Haruo Kato, Hiroshi Kawanishi, Takashi Fujii: Automatic layout algorithms for function blocks of CMOS gate arrays. DAC 1985: 46-52 |
| 1 | Takashi Fujii | [1] |
| 2 | Etsuko Fukuda | [1] |
| 3 | Haruo Kato | [1] |
| 4 | Hiroshi Kawanishi | [1] |
| 5 | Shigeo Noda | [1] |