Takuya Yasui
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2000
1
EE
Masahiko Toyonaga
,
Keiichi Kurokawa
, Takuya Yasui,
Atsushi Takahashi
: A practical clock tree synthesis for semi-synchronous circuits.
ISPD 2000
: 159-164
Coauthor
Index
1
Keiichi Kurokawa
[
1
]
2
Atsushi Takahashi
[
1
]
3
Masahiko Toyonaga
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
