| 2008 |
|---|
| 4 | EE | Shuai Wang,
Hongyan Yang,
Jie Hu,
Sotirios G. Ziavras:
Asymmetrically banked value-aware register files for low-energy and high-performance.
Microprocessors and Microsystems - Embedded Hardware Design 32(3): 171-182 (2008) |
| 2007 |
|---|
| 3 | EE | Shuai Wang,
Hongyan Yang,
Jie Hu,
Sotirios G. Ziavras:
Asymmetrically Banked Value-Aware Register Files.
ISVLSI 2007: 363-368 |
| 2 | EE | Hongyan Yang,
Shuai Wang,
Sotirios G. Ziavras,
Jie Hu:
Vector Processing Support for FPGA-Oriented High Performance Applications.
ISVLSI 2007: 447-448 |
| 1 | EE | Hongyan Yang,
Sotirios G. Ziavras,
Jie Hu:
FPGA-based Vector Processing for Matrix Operations.
ITNG 2007: 989-994 |
