Shanzhen Xing
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1998
1
EE
Shanzhen Xing,
William W. H. Yu
: FPGA Adders: Performance Evaluation and Optimal Design.
IEEE Design & Test of Computers 15
(1): 24-29 (1998)
Coauthor
Index
1
William W. H. Yu
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1
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Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
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