Gera Weiss

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8EERajeev Alur, Aldric Degorre, Oded Maler, Gera Weiss: On Omega-Languages Defined by Mean-Payoff Conditions. FOSSACS 2009: 333-347
7EEGera Weiss, Sebastian Fischmeister, Madhukar Anand, Rajeev Alur: Specification and Analysis of Network Resource Requirements of Control Systems. HSCC 2009: 381-395
6EERajeev Alur, Aditya Kanade, Gera Weiss: Ranking Automata and Games for Prioritized Requirements. CAV 2008: 240-253
5EERajeev Alur, Gera Weiss: RTComposer: a framework for real-time components with scheduling interfaces. EMSOFT 2008: 159-168
4EERajeev Alur, Gera Weiss: Regular Specifications of Resource Requirements for Embedded Control Software. IEEE Real-Time and Embedded Technology and Applications Symposium 2008: 159-168
3EEGera Weiss, Rajeev Alur: Automata Based Interfaces for Control and Scheduling. HSCC 2007: 601-613
2EEGera Weiss: State Nullification of Switched Systems by Linear Output Feedback. HSCC 2007: 775-778
1EEDavid Harel, Hillel Kugler, Gera Weiss: Some Methodological Observations Resulting from Experience Using LSCs and the Play-In/Play-Out Approach. Scenarios: Models, Transformations and Tools 2003: 26-42

Coauthor Index

1Rajeev Alur [3] [4] [5] [6] [7] [8]
2Madhukar Anand [7]
3Aldric Degorre [8]
4Sebastian Fischmeister [7]
5David Harel [1]
6Aditya Kanade [6]
7Hillel Kugler [1]
8Oded Maler [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)