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| 2005 | ||
|---|---|---|
| 2 | EE | Qingsheng Hu, Zhigong Wang, Jun Zhang, Jie Xiao: Low complexity parallel Chien search architecture for RS decoder. ISCAS (1) 2005: 340-343 |
| 1991 | ||
| 1 | Zhigong Wang, Ulrich Langmann, Berthold G. Bosch: Multi-Gb/s Silicon Bipolar Clock Recovery IC. IEEE Journal on Selected Areas in Communications 9(5): 656-663 (1991) | |
| 1 | Berthold G. Bosch | [1] |
| 2 | Qingsheng Hu | [2] |
| 3 | Ulrich Langmann | [1] |
| 4 | Jie Xiao | [2] |
| 5 | Jun Zhang | [2] |