| |
| 2002 | ||
|---|---|---|
| 2 | EE | Jih-Ching Chiu, Michael Jin-Yi Wang, Chung-Ping Chung: Design of Instruction Address Queue for High Degree X86 Superscalar Architecture. J. Inf. Sci. Eng. 18(3): 393-409 (2002) |
| 1 | EE | Jih-Ching Chiu, Michael Jin-Yi Wang, Chung-Ping Chung: Design of Instruction Address Queue for High Degree X86 Superscalar Architecture. J. Inf. Sci. Eng. 18(3): 393-409 (2002) |
| 1 | Jih-Ching Chiu | [1] [2] |
| 2 | Chung-Ping Chung | [1] [2] |