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Dan Wallin

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2006
8EEDan Wallin, Henrik Löf, Erik Hagersten, Sverker Holmgren: Multigrid and Gauss-Seidel smoothers revisited: parallelization on chip multiprocessors. ICS 2006: 145-155
2005
7 Dan Wallin, Håkan Zeffer, Martin Karlsson, Erik Hagersten: VASA: A Simulator Infrastructure with Adjustable Fidelity. IASTED PDCS 2005: 554-563
2004
6EEDan Wallin, Erik Hagersten: Bundling: Reducing the Overhead of Multiprocessor Prefetchers. IPDPS 2004
5EEHenrik Johansson, Dan Wallin, Sverker Holmgren: Analyzing Advanced PDE Solvers Through Simulation. PARA 2004: 893-900
2003
4EEDan Wallin, Erik Hagersten: Miss Penalty Reduction Using Bundled Capacity Prefetching in Multiprocessors. IPDPS 2003: 12
3 Dan Wallin, Henrik Johansson, Sverker Holmgren: Cache Memory Behavior of Advanced PDE Solvers. PARCO 2003: 475-482
2002
2EESverker Holmgren, Markus Nordén, Jarmo Rantakokko, Dan Wallin: Performance of PDE solvers on a self-optimizing NUMA architecture. Parallel Algorithms Appl. 17(4): 285-299 (2002)
2001
1EESverker Holmgren, Dan Wallin: Performance of High-Accuracy PDE Solvers on a Self-Optimizing NUMA Architecture. Euro-Par 2001: 602-610

Coauthor Index

1Erik Hagersten [4] [6] [7] [8]
2Sverker Holmgren [1] [2] [3] [5] [8]
3Henrik Johansson [3] [5]
4Martin Karlsson [7]
5Henrik Löf [8]
6Markus Nordén [2]
7Jarmo Rantakokko [2]
8Håkan Zeffer [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)