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1997 | ||
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2 | EE | Peter A. Walker, Sumit Ghosh: On the nature and inadequacies of transport timing delay constructs in VHDL descriptions. IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 894-915 (1997) |
1995 | ||
1 | EE | Peter A. Walker, Sumit Ghosh: Asynchronous, Distributed Event Driven Simulation Algorithm for Execution of VHDL on Parallel Processors. DAC 1995: 144-150 |
1 | Sumit Ghosh | [1] [2] |