Sameer Wadhwa

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3EENivedita Deshmukh, Sameer Wadhwa: A Meta Model for Iterative Development of Requirements Leveraging. RE 2007: 343-349
2EEReetinder P. S. Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna: A Self-Reconfigurable Gate Array Architecture. FPL 2000: 106-120
1EESameer Wadhwa, Andreas Dandalis: Efficient Self-Reconfigurable Implementations Using On-chip Memory. FPL 2000: 443-448

Coauthor Index

1Andreas Dandalis [1]
2Nivedita Deshmukh [3]
3Alessandro Mei [2]
4Viktor K. Prasanna (V. K. Prasanna Kumar) [2]
5Reetinder P. S. Sidhu [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)