2008 |
14 | EE | Karine Deschinkel,
Sid Ahmed Ali Touati:
Efficient Method for Periodic Task Scheduling with Storage Requirement Minimization.
COCOA 2008: 438-447 |
13 | EE | Mounira Bachir,
Sid Ahmed Ali Touati,
Albert Cohen:
Post-pass periodic register allocation to minimise loop unrolling degree.
LCTES 2008: 141-150 |
2007 |
12 | EE | Johnny Huynh,
José Nelson Amaral,
Paul Berube,
Sid Ahmed Ali Touati:
Evaluation of Offset Assignment Heuristics.
HiPEAC 2007: 261-275 |
11 | EE | Sid Ahmed Ali Touati:
On the Periodic Register Need in Software Pipelining.
IEEE Trans. Computers 56(11): 1493-1504 (2007) |
2006 |
10 | EE | Sid Ahmed Ali Touati,
Denis Barthou:
On the decidability of phase ordering problem in optimizing compilation.
Conf. Computing Frontiers 2006: 147-156 |
9 | EE | William Jalby,
Christophe Lemuet,
Sid Ahmed Ali Touati:
An efficient memory operations optimization technique for vector loops on Itanium 2 processors.
Concurrency and Computation: Practice and Experience 18(11): 1485-1508 (2006) |
2005 |
8 | EE | Sid Ahmed Ali Touati:
On the Optimality of Register Saturation.
Electr. Notes Theor. Comput. Sci. 132(1): 131-148 (2005) |
7 | EE | Sid Ahmed Ali Touati:
Register Saturation in Instruction Level Parallelism.
International Journal of Parallel Programming 33(4): 393-449 (2005) |
2004 |
6 | EE | Christophe Lemuet,
William Jalby,
Sid Ahmed Ali Touati:
Improving Load/Store Queues Usage in Scientific Computing.
ICPP 2004: 38-45 |
5 | EE | Sid Ahmed Ali Touati:
On the Optimality of Register Saturation.
ICPP Workshops 2004: 563-570 |
4 | EE | Sid Ahmed Ali Touati,
Christine Eisenbeis:
Early Periodic Register Allocation on ILP Processors.
Parallel Processing Letters 14(2): 287-313 (2004) |
2003 |
3 | EE | Sid Ahmed Ali Touati,
Christine Eisenbeis:
Early Control of Register Pressure for Software Pipelined Loops.
CC 2003: 17-32 |
2001 |
2 | EE | Sid Ahmed Ali Touati:
Register Saturation in Superscalar and VLIW Codes.
CC 2001: 213-228 |
1 | EE | Sid Ahmed Ali Touati:
Optimal acyclic fine-grain scheduling with cache effects for embedded and real time systems.
CODES 2001: 159-164 |