Vinaya Kumar Singh

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1993

2 Vinaya Kumar Singh, A. A. Diwan: A Heuristic for Decomposition in Multi-Level Logic Optimization. VLSI Design 1993: 5-8

1 EE Vinaya Kumar Singh, A. A. Diwan: A heuristic for decomposition in multilevel logic optimization. IEEE Trans. VLSI Syst. 1(4): 441-445 (1993)

1993
2		Vinaya Kumar Singh, A. A. Diwan: A Heuristic for Decomposition in Multi-Level Logic Optimization. VLSI Design 1993: 5-8
1	EE	Vinaya Kumar Singh, A. A. Diwan: A heuristic for decomposition in multilevel logic optimization. IEEE Trans. VLSI Syst. 1(4): 441-445 (1993)

Coauthor Index

1 A. A. Diwan [1] [2]