Myung Chul Shin

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2004

1 Jong Kang Park, Jong Tae Kim, Myung Chul Shin: High Performance Single Chip Implementation for a Digital Protective Relay Using FPGA. ESA/VLSI 2004: 504-508

2004
1		Jong Kang Park, Jong Tae Kim, Myung Chul Shin: High Performance Single Chip Implementation for a Digital Protective Relay Using FPGA. ESA/VLSI 2004: 504-508

Coauthor Index

1 Jong Tae Kim [1]

2 Jong Kang Park [1]