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Toshishige Shimamura

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2007
3EESatoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi: Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI. IEICE Transactions 90-C(10): 1892-1899 (2007)
2006
2EESatoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi: Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and Identifier. IEICE Transactions 89-C(4): 540-550 (2006)
2005
1EETakakuni Douseki, Toshishige Shimamura, Nobutaro Shibata: A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation. IEICE Transactions 88-C(4): 582-588 (2005)

Coauthor Index

1Takakuni Douseki [1]
2Koji Fujii [2]
3Takahiro Hatano [2] [3]
4Namiko Ikeda [2] [3]
5Hakaru Kyuragi [2]
6Katsuyuki Machida [2] [3]
7Hiroki Morimura [2] [3]
8Mamoru Nakanishi [2] [3]
9Yukio Okazaki [2] [3]
10Nobutaro Shibata [1]
11Satoshi Shigematsu [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)