2007 |
4 | | Himanshu Thapliyal,
Hamid R. Arabnia,
Rajnish Bajpai,
Kamal K. Sharma:
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic.
CDES 2007: 90-94 |
3 | | Himanshu Thapliyal,
Hamid R. Arabnia,
Rajnish Bajpai,
Kamal K. Sharma:
Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs.
PDPTA 2007: 449-452 |
2 | EE | Himanshu Thapliyal,
Hamid R. Arabnia,
Rajnish Bajpai,
Kamal K. Sharma:
Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs
CoRR abs/0711.2671: (2007) |
1 | EE | Himanshu Thapliyal,
Hamid R. Arabnia,
Rajnish Bajpai,
Kamal K. Sharma:
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic
CoRR abs/0711.2674: (2007) |