2003 | ||
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1 | EE | John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas: Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. DAC 2003: 688-690 |
1 | Jaeha Kim | [1] |
2 | John G. Maneatis | [1] |
3 | Jay Maxey | [1] |
4 | Iain McClatchie | [1] |