Jürgen Schietke

List of publications from the DBLP Bibliography Server - FAQ

2002

3 Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen: Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip. Discrete Applied Mathematics 123(1-3): 103-127 (2002)

1999

2 EE Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen: Cycle time and slack optimization for VLSI-chips. ICCAD 1999: 232-238

1998

1 EE Uwe Fassnacht, Jürgen Schietke: Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset. DATE 1998: 325-331

2002
3		Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen: Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip. Discrete Applied Mathematics 123(1-3): 103-127 (2002)
1999
2	EE	Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen: Cycle time and slack optimization for VLSI-chips. ICCAD 1999: 232-238
1998
1	EE	Uwe Fassnacht, Jürgen Schietke: Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset. DATE 1998: 325-331

Coauthor Index