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T. Schiefelbein

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1995
2EEH. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler: Hardware Assists for High Performance Computing Using a Mathematics of Arrays. FPGA 1995: 39-45
1 W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottinger, L. R. Mullin, R. Ziegler: An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays. ISCAS 1995: 945-948

Coauthor Index

1W. Eatherton [1] [2]
2J. Kelly [1] [2]
3L. R. Mullin [1] [2]
4H. Pottinger [1] [2]
5R. Ziegler [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)