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| 1995 | ||
|---|---|---|
| 2 | EE | H. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler: Hardware Assists for High Performance Computing Using a Mathematics of Arrays. FPGA 1995: 39-45 |
| 1 | W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottinger, L. R. Mullin, R. Ziegler: An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays. ISCAS 1995: 945-948 | |
| 1 | W. Eatherton | [1] [2] |
| 2 | L. R. Mullin | [1] [2] |
| 3 | H. Pottinger | [1] [2] |
| 4 | T. Schiefelbein | [1] [2] |
| 5 | R. Ziegler | [1] [2] |