2009 |
49 | EE | Eerke A. Boiten,
John Derrick,
Gerhard Schellhorn:
Relational concurrent refinement part II: Internal operations and outputs.
Formal Asp. Comput. 21(1-2): 65-102 (2009) |
2008 |
48 | EE | Gerhard Schellhorn:
Refinement of State-Based Systems: ASMs and Big Commuting Diagrams (Abstract).
ABZ 2008: 39-41 |
47 | EE | Gerhard Schellhorn,
Richard Banach:
A Concept-Driven Construction of the Mondex Protocol Using Three Refinements.
ABZ 2008: 57-70 |
46 | EE | Andriy Dunets,
Gerhard Schellhorn,
Wolfgang Reif:
Automating Algebraic Specifications of Non-freely Generated Data Types.
ATVA 2008: 141-155 |
45 | EE | Holger Grandy,
Markus Bischof,
Kurt Stenzel,
Gerhard Schellhorn,
Wolfgang Reif:
Verification of Mondex Electronic Purses with KIV: From a Security Protocol to Verified Code.
FM 2008: 165-180 |
44 | EE | John Derrick,
Gerhard Schellhorn,
Heike Wehrheim:
Mechanizing a Correctness Proof for a Lock-Free Concurrent Stack.
FMOODS 2008: 78-95 |
43 | EE | Michael Balser,
Simon Bäumler,
Wolfgang Reif,
Gerhard Schellhorn:
Interactive Verification of Concurrent Systems using Symbolic Execution.
LPAR Workshops 2008 |
42 | EE | Andriy Dunets,
Gerhard Schellhorn,
Wolfgang Reif:
Bounded Relational Analysis of Free Data Types.
TAP 2008: 99-115 |
41 | EE | Richard Banach,
Gerhard Schellhorn:
On the Refinement of Atomic Actions.
Electr. Notes Theor. Comput. Sci. 201: 3-30 (2008) |
40 | EE | Eerke A. Boiten,
John Derrick,
Gerhard Schellhorn:
Preface.
Electr. Notes Theor. Comput. Sci. 214: 1 (2008) |
39 | EE | Gerhard Schellhorn:
Completeness of ASM Refinement.
Electr. Notes Theor. Comput. Sci. 214: 25-49 (2008) |
38 | EE | Dominik Haneberg,
Gerhard Schellhorn,
Holger Grandy,
Wolfgang Reif:
Verification of Mondex electronic purses with KIV: from transactions to a security protocol.
Formal Asp. Comput. 20(1): 41-59 (2008) |
37 | | Gerhard Schellhorn:
ASM Refinement Preserving Invariants.
J. UCS 14(12): 1929-1948 (2008) |
2007 |
36 | EE | Nina Moebius,
Dominik Haneberg,
Wolfgang Reif,
Gerhard Schellhorn:
A Modeling Framework for the Development of Provably Secure E-Commerce Applications.
ICSEA 2007: 8 |
35 | EE | John Derrick,
Gerhard Schellhorn,
Heike Wehrheim:
Proving Linearizability Via Non-atomic Refinement.
IFM 2007: 195-214 |
34 | EE | Dominik Haneberg,
Holger Grandy,
Wolfgang Reif,
Gerhard Schellhorn:
Verifying Smart Card Applications: An ASM Approach.
IFM 2007: 313-332 |
33 | EE | Frank Ortmeier,
Gerhard Schellhorn:
Formal Fault Tree Analysis - Practical Experiences.
Electr. Notes Theor. Comput. Sci. 185: 139-151 (2007) |
2006 |
32 | EE | Gerhard Schellhorn,
Holger Grandy,
Dominik Haneberg,
Wolfgang Reif:
The Mondex Challenge: Machine Checked Proofs for an Electronic Purse.
FM 2006: 16-31 |
2005 |
31 | EE | Dominik Haneberg,
Holger Grandy,
Wolfgang Reif,
Gerhard Schellhorn:
Verifying Security Protocols: An ASM Approach.
Abstract State Machines 2005: 247-262 |
30 | EE | Gerhard Schellhorn:
ASMs and Refinement of State-based Systems.
Abstract State Machines 2005: 74-75 |
29 | EE | Frank Ortmeier,
Wolfgang Reif,
Gerhard Schellhorn:
Formal Safety Analysis of a Radio-Based Railroad Crossing Using Deductive Cause-Consequence Analysis (DCCA).
EDCC 2005: 210-224 |
28 | EE | Gerhard Schellhorn:
ASM refinement and generalizations of forward simulation in data refinement: a comparison.
Theor. Comput. Sci. 336(2-3): 403-435 (2005) |
2004 |
27 | | Wolfgang Reif,
Frank Ortmeier,
Andreas Thums,
Gerhard Schellhorn:
Integrated formal methods for safety analysis of train systems.
IFIP Congress Topical Sessions 2004: 637-642 |
26 | EE | Andreas Thums,
Gerhard Schellhorn,
Frank Ortmeier,
Wolfgang Reif:
Interactive Verification of Statecharts.
SoftSpez Final Report 2004: 355-373 |
25 | EE | Frank Ortmeier,
Wolfgang Reif,
Gerhard Schellhorn:
Introduction to Subject Area "Verification".
SoftSpez Final Report 2004: 419-422 |
24 | EE | Frank Ortmeier,
Andreas Thums,
Gerhard Schellhorn,
Wolfgang Reif:
Combining Formal Methods and Safety Analysis - The ForMoSA Approach.
SoftSpez Final Report 2004: 474-493 |
2003 |
23 | EE | Andreas Thums,
Gerhard Schellhorn:
Model Checking FTA.
FME 2003: 739-757 |
22 | EE | Rudolf Berghammer,
Dominik Haneberg,
Wolfgang Reif,
Gerhard Schellhorn:
Special Issue on Tools for System Design and Verification.
J. UCS 9(2): 86-87 (2003) |
2002 |
21 | EE | Frank Ortmeier,
Gerhard Schellhorn,
Andreas Thums,
Wolfgang Reif,
Bernhard Hering,
Helmut Trappschuh:
Safety Analysis of the Height Control System for the Elbtunnel.
SAFECOMP 2002: 296-308 |
20 | EE | Michael Balser,
Christoph Duelli,
Wolfgang Reif,
Gerhard Schellhorn:
Verifying Concurrent Systems with Symbolic Execution.
J. Log. Comput. 12(4): 549-560 (2002) |
19 | | Gerhard Schellhorn,
Wolfgang Reif,
Axel Schairer,
Paul A. Karger,
Vernon Austel,
David C. Toll:
Verified Formal Security Models for Multiapplicative Smart Cards.
Journal of Computer Security 10(4): 339-368 (2002) |
2001 |
18 | EE | Wolfgang Reif,
Gerhard Schellhorn,
Andreas Thums:
Flaw Detection in Formal Specifications.
IJCAR 2001: 642-657 |
17 | EE | Wolfgang Reif,
Gerhard Schellhorn:
J.UCS Special Issue on Tools for System Design and Verification - Part 1.
J. UCS 7(1): 1-2 (2001) |
16 | EE | Gerhard Schellhorn:
Verification of ASM Refinements Using Generalized Forward Simulation.
J. UCS 7(11): 952-979 (2001) |
15 | EE | Wolfgang Reif,
Gerhard Schellhorn:
J.UCS Special Issue on Tools for System Design and Verification - Part 2.
J. UCS 7(2): 105-106 (2001) |
14 | EE | Wolfgang Reif,
Gerhard Schellhorn,
Tobias Vollmer,
Jürgen Ruf:
Correctness of Efficient Real-Time Model Checking.
J. UCS 7(2): 194-209 (2001) |
2000 |
13 | EE | Gerhard Schellhorn,
Wolfgang Reif,
Axel Schairer,
Paul A. Karger,
Vernon Austel,
David C. Toll:
Verification of a Formal Security Model for Multiapplicative Smart Cards.
ESORICS 2000: 17-36 |
12 | EE | Michael Balser,
Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel,
Andreas Thums:
Formal System Development with KIV.
FASE 2000: 363-366 |
11 | EE | Wolfgang Reif,
Jürgen Ruf,
Gerhard Schellhorn,
Tobias Vollmer:
Do You Trust Your Model Checker?
FMCAD 2000: 179-196 |
1998 |
10 | | Michael Balser,
Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
KIV 3.0 for Provably Correct Systems.
FM-Trends 1998: 330-337 |
9 | | Dieter Hutter,
Heiko Mantel,
Georg Rock,
Werner Stephan,
Andreas Wolpers,
Michael Balser,
Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
VSE: Controlling the Complexity in Formal Software Developments.
FM-Trends 1998: 351-358 |
1997 |
8 | | Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
Proving System Correctness with KIV 3.0.
CADE 1997: 69-72 |
7 | | Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
Proving System Correctness with KIV.
TAPSOFT 1997: 859-862 |
6 | EE | Gerhard Schellhorn,
Wolfgang Ahrendt:
Reasoning about Abstract State Machines: The WAM Case Study.
J. UCS 3(4): 377-413 (1997) |
1995 |
5 | | Gerhard Schellhorn,
Axel Burandt:
KIV.
Formal Development of Reactive Systems 1995: 229-245 |
4 | | Thomas Fuchß,
Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
Three Selected Case Studies in Verification.
KORSO Book 1995: 371-387 |
1994 |
3 | | Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
Formal Specification and Verification Using KIV.
FTRTFT 1994: 787-787 |
2 | | Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel:
Tactics in KIV.
Elektronische Informationsverarbeitung und Kybernetik 30(5/6): 293-310 (1994) |
1993 |
1 | | Rainer Drexler,
Wolfgang Reif,
Gerhard Schellhorn,
Kurt Stenzel,
Werner Stephan,
Andreas Wolpers:
The KIV System: A Tool for Formal Program Development.
STACS 1993: 704-705 |