| 2007 |
|---|
| 9 | EE | Atsushi Iwata,
Takeshi Yoshida,
Mamoru Sasaki:
Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices.
IEICE Transactions 90-C(6): 1149-1155 (2007) |
| 2006 |
|---|
| 8 | EE | Takeshi Yoshida,
Yoshihiro Masui,
Takayuki Mashimo,
Mamoru Sasaki,
Atsushi Iwata:
A 1 V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique.
IEICE Transactions 89-C(6): 769-774 (2006) |
| 2005 |
|---|
| 7 | EE | Takeshi Yoshida,
Miho Akagi,
Mamoru Sasaki,
Atsushi Iwata:
A 1V supply successive approximation ADC with rail-to-rail input voltage range.
ISCAS (1) 2005: 192-195 |
| 6 | EE | Mitsuru Shiozaki,
Toru Mukai,
Masahiro Ono,
Mamoru Sasaki,
Atsushi Iwata:
A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique.
IEICE Transactions 88-C(6): 1233-1240 (2005) |
| 1998 |
|---|
| 5 | | Hongbing Zhu,
Mamoru Sasaki,
Takahiro Inoue,
K. Sugitani:
A Proof of Convergence of Asynchronous Boltzmann Machine.
ICONIP 1998: 522-525 |
| 1994 |
|---|
| 4 | | Hongbing Zhu,
Mamoru Sasaki,
Fumio Ueno,
Takahiro Inoue:
An Appraoch of Sequential-Like Parallel Algorithm in Boltzmann Machine.
ISCAS 1994: 439-442 |
| 1992 |
|---|
| 3 | | Kazutaka Taniguchi,
Mamoru Sasaki,
Yutaka Ogata,
Fumio Ueno,
Takahiro Inoue:
Bi-CMOS Current Mode Multiple Valued Logic Circuits with 1.5V Supply Voltage.
ISMVL 1992: 216-220 |
| 1991 |
|---|
| 2 | | Mamoru Sasaki,
Fumio Ueno:
A Fuzzy Logic Function Generator (FLUG) Implemented with Current Mode CMOS Circuits.
ISMVL 1991: 356-362 |
| 1990 |
|---|
| 1 | | Mamoru Sasaki,
Takahiro Inoue,
Yuji Shirai,
Fumio Ueno:
Fuzzy Multiple-Input Maximum and Minimum Circuits in Current Mode and Their Analyses Using Bounded-Difference Equations.
IEEE Trans. Computers 39(6): 768-774 (1990) |
