Yaska Sankar
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1999
1
EE
Yaska Sankar,
Jonathan Rose
: Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs.
FPGA 1999
: 157-166
Coauthor
Index
1
Jonathan Rose
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
