| 2006 |
|---|
| 6 | EE | A. K. Gupta,
E. Sanchez-Sinencio,
S. Karthikeyan,
Wern Ming Koe,
Yong-In Park:
Second order dynamic element matching technique for low oversampling delta sigma ADC.
ISCAS 2006 |
| 2002 |
|---|
| 5 | EE | F. Dulger,
E. Sanchez-Sinencio:
Design trade-offs of a symmetric linearized CMOS LC VCO.
ISCAS (4) 2002: 397-400 |
| 4 | EE | José L. Ausín,
R. Pérez-Aloe,
J. Francisco Duque-Carrillo,
Guido Torelli,
E. Sanchez-Sinencio:
High-selectivity SC filters with continuous digital Q-factor programmability.
ISCAS (4) 2002: 631-634 |
| 3 | EE | A. N. Mohieldin,
A. Emira,
E. Sanchez-Sinencio:
A 2-V 11-bit incremental A/D converter using floating gate technique.
ISCAS (4) 2002: 667-670 |
| 1999 |
|---|
| 2 | | B. Provost,
E. Sanchez-Sinencio:
Auto-calibrating analog timer for on-chip testing.
ITC 1999: 541-548 |
| 1998 |
|---|
| 1 | EE | B. Provost,
E. Sanchez-Sinencio,
Anna Maria Brosa:
A Unified Approach for a Time-Domain Built-In Self-Test Technique and Fault Detection.
Great Lakes Symposium on VLSI 1998: 230-236 |
