| |
| 2008 | ||
|---|---|---|
| 2 | EE | Srividhya Rammohan, Vijay Sundaresan, Ranga Vemuri: Reduced Complementary Dynamic and Differential Logic: A CMOS Logic Style for DPA-Resistant Secure IC Design. VLSI Design 2008: 699-705 |
| 2007 | ||
| 1 | EE | Vijay Sundaresan, Srividhya Rammohan, Ranga Vemuri: Power invariant secure IC design methodology using reduced complementary dynamic and differential logic. VLSI-SoC 2007: 1-6 |
| 1 | Vijay Sundaresan | [1] [2] |
| 2 | Ranga Vemuri | [1] [2] |