S. Raghunath
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2006
1
EE
S. Raghunath,
S. M. Aziz
: Design of an Area Efficient High-Speed Color FDWT Processor.
APCCAS 2006
: 474-477
Coauthor
Index
1
S. M. Aziz
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Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
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