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C. S. Raghu

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1999
2EEC. S. Raghu, Suravi Bhowmik, Poorvaja Ramani, S. Sundaram: COST Circuit Optimization SysTem in ASIC Library Development Environment. VLSI Design 1999: 460-463
1998
1EEC. S. Raghu, S. Sundaram: Distributed Logic Simulation Algorithm using Preemption of Inconsistent Events. VLSI Design 1998: 482-

Coauthor Index

1Suravi Bhowmik [2]
2Poorvaja Ramani [2]
3S. Sundaram [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)