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2007 | ||
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2 | EE | Riyaz A. Patel, Mohammed Benaissa, Said Boussakta: Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero. IEEE Trans. Computers 56(11): 1484-1492 (2007) |
1 | EE | Riyaz A. Patel, Mohammed Benaissa, Said Boussakta: Fast Modulo 2n - (2n-2+1) Addition: A New Class of Adder for RNS. IEEE Trans. Computers 56(4): 572-576 (2007) |
1 | Mohammed Benaissa | [1] [2] |
2 | Said Boussakta | [1] [2] |