1995 | ||
---|---|---|
1 | EE | S. Krishnakumar, P. Suresh, S. Sadashiva Rao, M. P. Pareek, R. Gupta: A single chip, pipelined, cascadable, multichannel, signal processor. VLSI Design 1995: 150-155 |
1 | R. Gupta | [1] |
2 | S. Krishnakumar | [1] |
3 | S. Sadashiva Rao | [1] |
4 | P. Suresh | [1] |