Ashish Pancholy
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1992
1
EE
Ashish Pancholy,
Janusz Rajski
,
Larry J. McNaughton
: Empirical Failure Analysis and Validation of Fault Models in CMOS VLSI Circuits.
IEEE Design & Test of Computers 9
(1): 72-83 (1992)
Coauthor
Index
1
Larry J. McNaughton
[
1
]
2
Janusz Rajski
[
1
]
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Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
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