Susheel Nawal
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2007
1
EE
M. Jagadesh Kumar
,
Vivek Venkataraman
, Susheel Nawal: Analytical Drain Current Model of Nanoscale Strained-Si/SiGe MOSFETs for Analog Circuit Simulation.
VLSI Design 2007
: 189-194
Coauthor
Index
1
M. Jagadesh Kumar
[
1
]
2
Vivek Venkataraman
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
