J. Greg Nash

2005
6	EE	J. Greg Nash: Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs. FCCM 2005: 305-306
2002
5	EE	J. Greg Nash: Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays. FCCM 2002: 299-300
1993
4	EE	Mary Mehrnoosh Eshaghian, J. Greg Nash, Muhammad E. Shaaban, David B. Shu: Heterogeneous Algorithms for Image Understanding Architecture. Parallel Algorithms Appl. 1(4): 273-284 (1993)
1991
3		David B. Shu, J. Greg Nash, K. Kim: Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks. IPPS 1991: 216-223
1989
2	EE	K. Wojtek Przytula, J. Greg Nash: Parallel implementation of synthetic aperture radar algorithms. VLSI Signal Processing 1(1): 45-56 (1989)
1988
1		J. Greg Nash, Siegfried Hansen: Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations. IEEE Trans. Computers 37(2): 129-137 (1988)

Coauthor Index

1	Mary Mehrnoosh Eshaghian	[4]
2	Siegfried Hansen	[1]
3	K. Kim	[3]
4	K. Wojtek Przytula	[2]
5	Muhammad E. Shaaban	[4]
6	David B. Shu	[3] [4]

Colors in the list of coauthors