| |
| 2008 | ||
|---|---|---|
| 3 | EE | Mahmoud Ben Naser, Csaba Andras Moritz: Power and performance tradeoffs with process variation resilient adaptive cache architectures. SBCCI 2008: 123-128 |
| 2007 | ||
| 2 | EE | Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz: Designing Memory Subsystems Resilient to Process Variations. ISVLSI 2007: 357-363 |
| 2005 | ||
| 1 | EE | Yao Guo, Mahmoud Ben Naser, Csaba Andras Moritz: PARE: a power-aware hardware data prefetching engine. ISLPED 2005: 339-344 |
| 1 | Yao Guo | [1] [2] |
| 2 | Csaba Andras Moritz | [1] [2] [3] |