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2008 | ||
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2 | EE | Tadayoshi Enomoto, Suguru Nagayama, Hiroaki Shikano, Yousuke Hagiwara: Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array. IEICE Transactions 91-C(4): 553-561 (2008) |
2007 | ||
1 | EE | Tadayoshi Enomoto, Suguru Nagayama, Nobuaki Kobayashi: Low-Power High-Speed 180-nm CMOS Clock Drivers. ASP-DAC 2007: 126-127 |
1 | Tadayoshi Enomoto | [1] [2] |
2 | Yousuke Hagiwara | [2] |
3 | Nobuaki Kobayashi | [1] |
4 | Hiroaki Shikano | [2] |