2008 |
4 | EE | Basant K. Mohanty,
Pramod Kumar Meher:
Concurrent systolic architecture for high-throughput implementation of 3-dimensional discrete wavelet transform.
ASAP 2008: 162-166 |
3 | EE | Basant K. Mohanty,
Pramod Kumar Meher:
Throughput-scalable hybrid-pipeline architecture for multilevel lifting 2-D DWT of JPEG 2000 coder.
ASAP 2008: 305-309 |
2006 |
2 | EE | Basant K. Mohanty,
Pramod Kumar Meher:
VLSI Architecture for High-Speed / Low-Power Implementation of Multilevel Lifting DWT.
APCCAS 2006: 458-461 |
1 | EE | Basant K. Mohanty,
Pramod Kumar Meher:
Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform.
APCCAS 2006: 462-465 |