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Basant K. Mohanty

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2008
4EEBasant K. Mohanty, Pramod Kumar Meher: Concurrent systolic architecture for high-throughput implementation of 3-dimensional discrete wavelet transform. ASAP 2008: 162-166
3EEBasant K. Mohanty, Pramod Kumar Meher: Throughput-scalable hybrid-pipeline architecture for multilevel lifting 2-D DWT of JPEG 2000 coder. ASAP 2008: 305-309
2006
2EEBasant K. Mohanty, Pramod Kumar Meher: VLSI Architecture for High-Speed / Low-Power Implementation of Multilevel Lifting DWT. APCCAS 2006: 458-461
1EEBasant K. Mohanty, Pramod Kumar Meher: Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform. APCCAS 2006: 462-465

Coauthor Index

1Pramod Kumar Meher [1] [2] [3] [4]

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