| |
| 2008 | ||
|---|---|---|
| 1 | EE | Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula: Temperature and Process Variations Aware Power Gating of Functional Units. VLSI Design 2008: 515-520 |
| 1 | Sarvesh Bhardwaj | [1] |
| 2 | Deepa Kannan | [1] |
| 3 | Aviral Shrivastava | [1] |
| 4 | Sarma B. K. Vrudhula | [1] |