| |
| 2004 | ||
|---|---|---|
| 2 | R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi: Switching Activity Minimization in Combinational Logic Design. ESA/VLSI 2004: 47-53 | |
| 2003 | ||
| 1 | R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi: Power Optimized Combinational Logic Design. Embedded Systems and Applications 2003: 223-227 | |
| 1 | S. Chennupati | [1] [2] |
| 2 | Baback A. Izadi | [1] [2] |
| 3 | Damu Radhakrishnan | [1] [2] |
| 4 | Naveen K. Samala | [1] [2] |