Selene Maya
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2000
1
EE
Selene Maya,
Rocio Reynoso
,
César Torres
,
Miguel Arias-Estrada
: Compact Spiking Neural Network Implementation in FPGA.
FPL 2000
: 270-276
Coauthor
Index
1
Miguel Arias-Estrada
[
1
]
2
Rocio Reynoso
[
1
]
3
César Torres
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
