2003 | ||
---|---|---|
3 | EE | Yves Mathys, André Chátelain: Verification strategy for integration 3G baseband SoC. DAC 2003: 7-10 |
2001 | ||
2 | EE | André Chátelain, Yves Mathys, Giovanni Placido, Alberto La Rosa, Luciano Lavagno: High-level architectural co-simulation using Esterel and C. CODES 2001: 189-194 |
1992 | ||
1 | EE | Venu Vasudevan, Yves Mathys, Jim Tolar: DAMOCLES: an observer-based approach to design tracking. ICCAD 1992: 546-551 |
1 | André Chátelain | [2] [3] |
2 | Luciano Lavagno | [2] |
3 | Giovanni Placido | [2] |
4 | Alberto La Rosa | [2] |
5 | Jim Tolar | [1] |
6 | Venu Vasudevan | [1] |