J. H. Lou

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1994

1 James B. Kuo, K. W. Su, J. H. Lou: A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit. ISCAS 1994: 323-326

1994
1		James B. Kuo, K. W. Su, J. H. Lou: A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit. ISCAS 1994: 323-326

Coauthor Index

1 James B. Kuo [1]

2 K. W. Su [1]