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Te-Jung Lo

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2005
1EEJen-Shiun Chiang, Chih-Hsien Hsia, Hsin-Jung Chen, Te-Jung Lo: VLSI architecture of low memory and high speed 2D lifting-based discrete wavelet transform for JPEG2000 applications. ISCAS (5) 2005: 4554-4557

Coauthor Index

1Hsin-Jung Chen [1]
2Jen-Shiun Chiang [1]
3Chih-Hsien Hsia [1]

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