Chia-Jung Liu

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2006

1 EE Jiann-Chyi Rau, Po-Han Wu, Chia-Jung Liu: A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI Circuits. APCCAS 2006: 1883-1886

2006
1	EE	Jiann-Chyi Rau, Po-Han Wu, Chia-Jung Liu: A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI Circuits. APCCAS 2006: 1883-1886

Coauthor Index

1 Jiann-Chyi Rau [1]

2 Po-Han Wu [1]