| |
| 2004 | ||
|---|---|---|
| 4 | EE | Michael Dimopoulos, Panagiotis Linardis: Efficient Static Compaction of Test Sequence Sets through the Application of Set Covering Techniques. DATE 2004: 194-201 |
| 2003 | ||
| 3 | EE | Michael Dimopoulos, Panagiotis Linardis: Accelerating the compaction of test sequences in sequential circuits through problem size reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1443-1449 (2003) |
| 2002 | ||
| 2 | EE | Michael Dimopoulos, Panagiotis Linardis: Using Non-uniform Crossover in Genetic Algorithm Methods to Speed up the Generation of Test Patterns for Sequential Circuits. SETN 2002: 485-493 |
| 1999 | ||
| 1 | EE | Panagiotis Linardis, Ioannis P. Vlahavas: PARCIS: a robust parallel VLSI circuit simulator. Simul. Pr. Theory 7(1): 91-103 (1999) |
| 1 | Michael Dimopoulos | [2] [3] [4] |
| 2 | Ioannis P. Vlahavas | [1] |